The field of the invention is automatic offset compensating (i.e. auto-zeroing) circuits for high speed amplifiers and, more particularly, auto-zeroing circuits for computerized tomography (CT) data acquisition systems.
In a CT scanner, a large number of X-ray sensors are exposed to an X-ray source, each sensor producing a separate analog signal. Each of the sensor analog signals is then converted to a digital value at a high rate of speed to allow a rapid rate of successive X-ray exposures,or views. The conversion rate required can be quite high, usually less than 2.5 microseconds per conversion. This high speed signal processing requires that the amplifiers used in processing the analog signals prior to conversion to digital must have a wide frequency bandwidth. One of the trade-offs or negative aspects associated with the use of such high speed amplifiers is a loss or degradation of the D.C. or low frequency characteristics. One of the primary elements of this D.C. degradation is the tendency of the offset voltage error for the high speed amplifiers to drift with time and/or temperature.
One prior approach that has been used to improve the offset error performance of an individual high speed amplifier 10 is shown in FIG. 1. In this configuration, a second low speed amplifier 11 serves as an analog integrator. The input 12 of integrating amplifier 11 is connected through an analog switch 13 to the output 14 of the high speed amplifier 10. The output 15 of integrating amplifier 11 is connected to one input of a summing junction 16 feeding the input 17 of the high speed amplifier 10. Another input on summing junction 16 is selectably connected either through a second analog switch 20 to an analog input signal 22 to be amplified, or through a third analog switch 23 to a reference potential, e.g. ground 24.
During normal signal processing, switch 20 is closed and switches 13 and 23 are open. In that condition, the analog input signal 22 is summed with an offset correction value, i.e. the output 15 of offset integrating amplifier 11, before being amplified and appearing as the output signal 14. The "offset correction" signal 15 is adjusted periodically according to a predetermined duty cycle by activating an "ADJUST ANALOG OFFSET" signal on line 25. During the autozero interval, switch 20 is open and switches 13 and 24 are closed. In that case, ground potential is applied to one input of the summing junction 16, while the low speed integrator forces the output 14 of high speed amplifier 10 to the reference potential, i.e. zero, by the nature of the closed loop integration function. When the ADJUST ANALOG OFFSET signal 25 is deactivated, switches 13 and 24 are again opened. The integrating amplifier 11 then has zero input, and holds the output 15 at the last set offset correction value.
Several negative characteristics are associated with this approach. First, if the initial offset of the low speed integrator 11 is not zero, it must be adjusted or "tweaked" at manufacture. Second, if the offset of the low speed integrator 11 drifts with time, it must be re-adjusted. Third, because the autozero switches 13, 20 and 23 and their associated control line 25 are digital in nature, they may contribute excess noise, or electromagnetic interference into the normal signal. Fourth, because the switch 13 has charge injection associated with it, and the low speed integrator 11 has some finite leakage with time, the duty cycle for repeating "autozero mode" calibration is fairly high.
A final drawback to the prior autozero loop of FIG. 1 relates to its use in a data acquisition system for a CT scanner. In that application, several stages of preamplification are applied to the input signal in a switch selected manner in order to implement a "floating point" type preamplification. Preamplification is applied in discrete "gain ranges" to bring the input signal up to an optimum level for conversion to a digital value by an analog to digital (A/D) converter. The gain range selected serves as an "exponent" part of a digital floating point output, while the A/D output provides a fractional part. Each preamplification stage comprises one high speed amplifier 10, each of which introduces a separate offset error to be corrected. One autozero loop of the prior type needs to be dedicated to each preamplifier stage, or alternatively to each unique series of preamplifier stages, in order to offset correct all possible gain ranges. In addition, the A/D converter following the preamplification stages also introduces an offset and must be corrected as well.